Chip 74161 often can be configurated as below (on the left) to function as a counter, and the truth table is provided below on the right. For example, the circuit is connected such that LD’=EP=ET=1, D0=D1=D2=D3=0. If RD’=1, the output Q3Q2Q1Q0 counts upward naturally whenever the chip is triggered properly; but if RD’=0, the output will be reset back to all-zero state. Now let us assume the output is initially at 0000.
Chip 74161 Often Can Be Configurated As Below On The Left To Function As A Counter And The Truth Table Is Provided Be 1 (23.46 KiB) Viewed 34 times
Please derive the states of output Q3Q2Q1Q0 as a function of triggering clocks. (Note: not necessary to write/sketch the output waveforms) (8 pts)
(2) What is the modulus of the counter for the circuit? (2 pts)
Truth Table "0" 74161 DD DO D1 Q0 D2 D3 EP ET LD 四川田田田一 RE 0 19x Х в ххх 0 CONT EP ET Output state X X Set to 0000 X X Set to initial 0 1 Not changed XO NC but C=0 1 1 Counts 1 c 1 1 X 1 1 1 CP COUNTER 1 1
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