need help with part 4, 5 and 6 please

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need help with part 4, 5 and 6 please

Need Help With Part 4 5 And 6 Please 1 (134.29 KiB) Viewed 28 times

Need Help With Part 4 5 And 6 Please 2 (113.81 KiB) Viewed 28 times

3. amplifier shown signal generator for a 500 wave at 1.0 KHz. Check the amplit and frequency with your oscilloscope. Multisim V₁ = 500 mV pp 1.0 kHz 0.1 μF Vin RG 1.0 ΜΩ +15 V RL Quantity Gate voltage, VG Source voltage, Vs Drain voltage, VD Drain current, Ip Input voltage, Vin Output voltage, Vout Voltage gain, A, Phase difference RD 3.3 ΚΩ 2N5458 Rs 1.0 ΚΩ Table 9-2 Parameters for CS Amplifier DC values I 12.206mv 1-22 V 10-963 V 1.223 MA C₁ 1.0 μF C₂ 10 με Figure 9-1 Measure the de voltages listed in Table 9-2 and compute Ip. Set the function the voltage gain and note the phase difference (0° or 180°) between the input and the input and output ac voltage by viewing Vin and Vout simultaneously. Measure generator for a 500 m Vpp sine wave and measure the ac quantities listed. Compare output signal. Enter all data from this step in Table 9-2. Vou AC values 250mV 1.622 V 6.48 v 180° 10 кл R₁ 10 kQ
4. 5. 6. Change the source resistor from 1.0 kg to a smaller value. If you are using the same JFET as in Experiment 8, you can calculate the best self-bias resistor using the method described in Example 8-9 of the text. Otherwise, use a 620 52 resistor for Rs. You should observe a slight increase in gain with the smaller resistor, despite the fact that it is bypassed. Can you explain this gain increase? (Hint: consider gm.) Observations: Now change the load resistor from 10 ks2 to 100 ks. Does the gain change? Explain your observation: Troubleshooting Assume each of the faults listed in Table 9-3 is in the common-source amplifier circuit of Figure 9-1. Predict the outcome with the fault in place. Then put the fault in the circuit and test your prediction. Table 9-3 Fault C₂ is open Source and drain reversed VDD drops to +12 V RG open Conclusion: Part 1 Observation