- The Task Requires You Design A Circuit Using Vhdl And To Test It Using An Appropriate Testbench To Prove That The Circu 1 (72.75 KiB) Viewed 51 times
The task requires you design a circuit using VHDL and to test it using an appropriate testbench. To prove that the circu
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The task requires you design a circuit using VHDL and to test it using an appropriate testbench. To prove that the circu
The task requires you design a circuit using VHDL and to test it using an appropriate testbench. To prove that the circuit operates correctly, you will need to devise suitable sets of test inputs, and to run simulations in Vivado to generate output waveforms. You should also use Vivado to verify that the circuit can be suc- cessfully synthesised into a hardware circuit for use on an FPGA device. Note that this project does not require the design to implemented onto a Basys 3 board (if you wish, you can do this as an optional extra). You are likely to require one or more counter circuits to realise the design. The requirements for the VHDL design for the pressurised air system are as follows: • One unit of payment is 50p. The system only accepts 50p coins and £1 coins. If a £1 coin is inserted, no change is given. • The system will supply pressurised air for X seconds per unit of payment. The value of X can be determined as follows: X = 60 + (last two digits of your student number) If a customer enters 50p, the air system will be programmed to run for X seconds; if £1 is entered, it will run for 2X seconds. • If a further coin is inserted while the machine is in operation, a further period of X or 2X will be added to the remaining time. EE270/EE325 - Introductory VHDL & FPGA Design page 1 summer coursework • The system should output a 1-bit signal to control the air supply (on or off). • An LED should be lit continuously while the machine is supplying air, until the remaining time dips below 10% of X. At this point, until the remaining time reaches zero, the LED should flash on and off. A buzzer should be switched on continuously during the final three seconds of operation. The buzzer is controlled using a 1-bit output (on/off). • The system should also have reset and clock enable inputs, and associated functionality.