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PLEASE ATEMPT ONLY IF YOU CAN ANSWER ALL THE PARTS OTHERWISE I WILL GIVE 3 DOWNVOTE
PLEASE ATEMPT ONLY IF YOU CAN ANSWER ALL THE PARTS OTHERWISE IWILL GIVE 3 DOWNVOTE
1.10.4 Section 1.6: Passive Devices 1.29 Assume a strip resistor has a sheet resistance of 1 kn/sq. and a total capacitance to ground of approximately 0.4 fF/μm². What is the RC time constant formed by a 4 k resistor with one end grounded assuming the resis- tor is 1 μm wide? What if it is only 0.4 μm wide? How does this compare with the time constant obtained using the n-well resistor in Example 1.20? 1.30 A reverse-biased pn junction with No = 10²6 atoms/m³ and N₁ = 1023 atoms/m³ is to be used as a varactor. What junction area and voltage range is needed to provide a capacitance tunable from 0.2 pF to 0.3 pF? www.TechnicalBooksPDF.com 72 Chapter 1 Integrated-Circuit Devices and Modelling 1.31 In a particular process, a metal-metal parallel plate capacitor can be realized with a density of 7 fF/μm² and a metal-metal sidewall capacitor can provide a density of 10 fF/μm². What would be the area of a 1 pF capacitor realized using each approach? Compare this with the area of a 1 pF MOS capacitor in a 45-nm CMOS processes using the parameters in Table 1.5. 1.32 Estimate the maximum percentage change in capacitance achievable using a MOS varactor in the 0.18-μm CMOS processes in Table 1.5.
1.10.4 Section 1.6: Passive Devices 1.29 Assume a strip resistor has a sheet resistance of 1 kn/sq. and a total capacitance to ground of approximately 0.4 fF/μm². What is the RC time constant formed by a 4 k resistor with one end grounded assuming the resis- tor is 1 μm wide? What if it is only 0.4 μm wide? How does this compare with the time constant obtained using the n-well resistor in Example 1.20? 1.30 A reverse-biased pn junction with No = 10²6 atoms/m³ and N₁ = 1023 atoms/m³ is to be used as a varactor. What junction area and voltage range is needed to provide a capacitance tunable from 0.2 pF to 0.3 pF? www.TechnicalBooksPDF.com 72 Chapter 1 Integrated-Circuit Devices and Modelling 1.31 In a particular process, a metal-metal parallel plate capacitor can be realized with a density of 7 fF/μm² and a metal-metal sidewall capacitor can provide a density of 10 fF/μm². What would be the area of a 1 pF capacitor realized using each approach? Compare this with the area of a 1 pF MOS capacitor in a 45-nm CMOS processes using the parameters in Table 1.5. 1.32 Estimate the maximum percentage change in capacitance achievable using a MOS varactor in the 0.18-μm CMOS processes in Table 1.5.