Consider a 6 stage pipeline processor. The number of cyclesneeded in stages FI - fetch instruction, DI - Decode Instruction,COA - Calculate Operand Addr, FO - Fetch Operand, El - ExecuteInstruction, WB - Write Back is shown below for the threeinstructions I1, I2, and I3
a. Draw the Time Space diagram for this pipeline with Time (Tx)on the X-axis and Instructions (ly) on Y axis or vice versa. b. Ifnon-pipelined, how many time cycles would be needed to execute theinstructions? (1) c. Calculate the speed-up factor for the system(1)
1-1 1-2 FI DI 3 2 1 1 1-3 2 2 COA 1 1 1 FO 3 2 2 ΕΙ 3 2 2 WB 3 3 2
Consider a 6 stage pipeline processor. The number of cycles needed in stages FI - fetch instruction, DI - Decode Instruc
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