- 1 4 Binary To 7 Segment Display Design A Logic Circuit With 4 Inputs A And B C And D And 8 Outputs A B C D E F G 1 (75.92 KiB) Viewed 19 times
Functional expressions for your binary to 7-segment display circuit outputs Provide the following: All minterms, for example a = m(...), sum of products, gates needed for SOP implementation without function minimization (just which and how many of each), all maxterms, for example a = // M (...), product of sums, gates needed for POS implementation without function minimization (just which and how many of each):
Function Minimization using a Karnaugh-maps CD AB 00 01 11 10 00 01 11 10 CD AB 00 01 11 10 00 01 11 10 CD AB 00 01 11 10 00 01 11 10
CD АВ 00 01 11 10 00 01 11 10 CD АВ 00 01 11 10 00 01 11 10 CD АВ 00 01 11 10 00 01 11 10
CD АВ 00 01 11 10 00 01 11 10 CD АВ 00 01 11 10 00 01 11 10
Circuit Implementation using gates (draw, build, test, demonstrate and get signature)
Heathkit Digital Trainer ETW-3700 The Digital Trainer systems are labeled 1-12. This spreadsheet is a record of what is broken. Many of the breadboard sockets are damaged and do not make a reliable connection. Switching the clock signals often fails to settle on the right frequency. 1 2 3 4 5 6 7 8 9 10 ОК ОК ОК ОК OK OK ОК Х Х х ОК OK ОК ОК ок ОК ок ОК ок ок ок ОК ОК ок ок OK ок ОК ОК ОК ОК ок ок ОК ок ОК ок X х OK ОК Logic Indicators |LED 1 LED 2 |LED 3 LED 4 Clock CLOCK 1 Hz CLOCK 1 kHz CLOCK 100 kHz NOT CLOCK Logic Switches A ок OK ОК х ОК ок ОК ок ок X ок ок ок ок OK ок ок ок ОК х ок ок ОК ОК OK Х х х Х х х х х X ок ОК х OK OK OK ок х х ОК ОК ок INOT A ОК ОК ОК ок ОК ОК ок ок х х ок ок ок ОК ОК ок х ок ок х х ОК ок ОК OK OK ОК X х OK ок ок ок ОК ок ок ок ОК ок ОК ок ок ОК ок ОК ОК ок ок ок ок ОК ок OK ок ОК ок ОК ОК ок ОК ОК OK ОК ОК ОК Ів B NOT B Power Supply + 12V - 12V |+5V Line Source Source Data Switches ISwitch 1 Switch 2 |Switch 3 Switch 4 Breadboard Large Breadboard ОК ОК ОК ОК ОК ок ОК OK OK х ок ок OK ок ок ок ок ОК ОК ОК ОК ок OK ОК ок Х ок х ок ОК ок ок ок ОК ок ОК OK OK ОК ОК ок ок ок ок ок ок ок ОК ОК ок х х ок х ок х х х Х х х X
The list of chips for the experiments in this course is provided in Table I. If the chip name you have is different from the name shown (different vendor), then write the name you have. Add any chip you have that is not listed and cross any chip listed you do not have. Table I: List of IC chips for experimentation Chip Name Description 74LSOO Quad 2-Input NAND Gate 74LSO2 Quad 2-Input NOR Gate 74L S04 Hex Inverter 74LS08 Quad 2-Input AND Gate 74LS11 Triple 3-Input AND Gate 74LS27 Triple 3-Input NOR Gate 74LS32 Quad 2-input OR Gate 74LS86 Quad 2-input ECLUSIVE OR Gate 74LS74 Dual D Flip Flop 74LS151 8-1 Multiplexer 74LS273 Octal D Flip Flop HDSP-5303 Common Cathode 7 Segment LED Display Supply voltages should be limited 5V to prevent destruction of ICs. Do not reverse the 5 V and ground connections to prevent destruction of ICs