- Vos M1 Spice Simulations Figure 1 1 Enter The Circuit Of Figure 1 Into Spice Do Not Specify The W And L Values Of The 1 (255.6 KiB) Viewed 9 times
Vos M1 SPICE Simulations: Figure 1 1. Enter the circuit of Figure 1 into SPICE. Do not specify the W and L values of the MOSFET on the schematic; these values are already in the model file. Set VDD = 5V. 2. Run DC Sweep. Sweep VGS from 0 to 5 volts. Obtain a plot of ID as a function of VGS. Also add a trace that is a mathematical expression for the drain current in the forward active region. ID = K(VGS-Vth)² μC W where K = 2 L Cox is the SPICE model parameter KP, Vth is the SPICE model parameter Vro, and W and L are the transistor dimensions.) Refer to the model file of the CD4007 n-channel transistor to obtain these parameters. 3. Add a plot showing VGS, VGD, and Vth. To plot VGD, you will need to use a math function of two circuit voltages. To plot Vth, just enter "1.6" as the trace expression. 4. Using vertical lines drawn on the graph, label the three regions of operation: cutoff, forward active, and linear (triode). 5. Change the circuit by removing Rp and replacing it with a wire. Now, VDs VDD. Assign a DC value of 2V to VGs, and then sweep VDD from 0 to 5V. Obtain a plot of ID. 6. Identify the value of VDs at which the transistor transitions into its saturation (i.e.. forward active) region. 7. Find an approximate value for AVDS/AID in each region. 8. In the linear region, find Rps = AVDs/ Alp and compare it with Rps = [μC (Vos-V₁)]' 9. In the saturation region, find ro= AVDs/ AID and compare it with - AD 10. Put RD back in the circuit. Repeat the simulation with the bulk terminal of the transistor connected to -1V instead of ground. 11. Run Bias point and find the value of Vth.