Question 1: Answer the following questions for the given Ladder Diagram program. Start 10.0 Slop 10.1 a. A Salem 10.3 1. How many inputs are used in the above program? What are their tags? 2. How many outputs are used in the above program? What are their addresses? B Motor 00.0 3. What is the logical value of "Motor" if "Start" is logic 1, and "Stop" is logic 0? Why? 4. What is the logical value of "LED" if "Start" is logic 1, and "Stop" is logic 0? Why? 5. What should the logical values of "Start", "Stop", and "Salem" be in order for "LED" to be logic 1? Mention two different answers. 6. There are unprofessional programming practices in the above program, mention two. Question 2: Based on the Ladder Diagram programming rules, mention a mistake in each of the following Ladder Diagram programs. ABCDEFGHOutput 1 00100000 11100111 01111100 ♥ ❤ . v Question 3: Given the status of the inputs of the following Ladder Diagram program, what are the status of "Output 1"? C D F 0 lolo HH Motor 00.0 M Y LED 00.2 v |H Ovettv
Question 4: Implement the following logical expression using Ladder Diagram programming language: Note: the expression is read from left to right. The operation between the circular brackets is done first. a. Include a picture of your program. b. Write the truth table for the expression. Question 5: Implement an AND gate from a NAND gate using two rungs only. a. Include a picture of your program. Question 6: Implement a 4-inputs EX-OR gate using Ladder Diagram programming language. a. Include a picture of your program. b. Draw the timing diagram of the implemented gate if the applied inputs are as follows: Input 1 Input 2 Input 3 Input 4 1 0 0 1 1 1 1 0 1 1 1
Question 7: Choose one answer only for the following questions. 1. If the values of the timing diagrams 1 and (NOT 2) are ¹. inputs to a logic gate, what would be the logic gate if the 2. output is the timing diagram 4? a. AND b. OR C. NOR d. EXOR e. None of the above 2. If the values of the timing diagrams 1 and (NOT 2) are 6 inputs to a logic gate, what would be the logic gate if the output is the timing diagram 5? a. OR b. NAND c. NOR d. EXNOR e. None of the above 3. If the values of the timing diagrams 1 and 2 are inputs to a logic gate, what would be the logic gate if the output is the timing diagram 6? a. OR b. NOR c. EXOR d. EXNOR e. None of the above 4. If the values of the timing diagrams 1 and 3 are inputs to a logic gate, what would be the logic gate if the output is the timing diagram 5? a. OR b. NOR EXOR c. d. EXNOR e. None of the above 5. The output of an EXOR gate will be always high if the inputs are: a. Timing diagrams 5 and 6 b. Timing diagrams 4 and 5 c. Timing diagrams 1 and 6 d. Timing diagrams 2 and 7 e. None of the above
6. If the values of the timing diagrams 4 and 5 are inputs to a logic gate, what would be the logic gate if the output is always low? a. OR b. AND c. NAND d. EXOR e. None of the above Question 8: Explain the testing scenario of the given timing diagram for the burglar alarm system. Activis Master Co Motion Detector Alarm Co Question 9: When input 10.0 (Switch 1) is high and either input 10.1 (Switch 2) or input 10.2 (Switch 3) is low, output Q0.0 (Alarm) is turned on; otherwise, output Q0.0 (Alarm) is turned off. Write the Ladder Diagram program for the described system and include a picture of it.
Question 1: Answer the following questions for the given Ladder Diagram program. Start 10.0 Slop 10.1 a. A Salem 10.3 1.
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