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QUESTION (a) (b) (1) (iii) Cik X 4 FigureQ.4(b) is a diagram of a 7-segment display. Q₁ Demonstrate by sketching how a 74138 decoder in FigureQ.4(a) and NAND gates can be used to implement the following logic functions. P(A,B,C) = m(0,1,2) and Q(A,B,C) = m(4,6,7) Q₂ Z (ii) A 7447 active-LOW BCD to 7-segment display decoder drives a common- anode 7-segment display. What are the outputs of the decoder (a, b, c, d, e, f, g) when input to the decoder is 0110? Tii G₁ Yo G2A Y₁ -G₂B Y₂ S₂ S₁ So X If an active-LOW BCD to 7-segment display decoder is used, what will happen to the LED segment of a common-anode versus a common-cathode display? Clock DA When the 7447 chip is replaced by a 7448 [active-HIGH BCD to 7-segment display decoder] what are the decoder's outputs (a, b, c, d, e, f, g) when input 0010 is asserted? FigureQ.4(a) (c) Circuits shown in FigureQ.4(c) has one input X and one output Z. Analyze the circuit and complete the timing diagram in Figure Q.4(d). The initial output for both flip-flops are 0 QA (MSB) QB SET Y3 Y4 Ys Y6 Y₁ CLR f Q a g b с d FigureQ.4(b) DB SET D Q -a> FigureQ.4(c) Figure Q.4(d) CLR Q Z
PLS HELP...
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