Real R. 4.7k 2 4.7k92 Va RS IkS2 M VA VA 04 Ver 10V V 1 INP H RA 1k02 W * R2 RE Ros ER 10V Q2 Q1 Q5 Ver Figure 1 IN SPIC

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Real R 4 7k 2 4 7k92 Va Rs Iks2 M Va Va 04 Ver 10v V 1 Inp H Ra 1k02 W R2 Re Ros Er 10v Q2 Q1 Q5 Ver Figure 1 In Spic 1 (98.83 KiB) Viewed 39 times

Real R. 4.7k 2 4.7k92 Va RS IkS2 M VA VA 04 Ver 10V V 1 INP H RA 1k02 W * R2 RE Ros ER 10V Q2 Q1 Q5 Ver Figure 1 IN SPICE Simulations Step 5. Enter the circuit of Figure i into SPICE. Be sure that SPICE has the "bias point detail" enabled and simulate the circuit with V=Vw = 0. Examine the simulation results to see if the bias currents and voltages are as expected (see Appendix A2.1). Specifically, check the following to see if they agree reasonably well with the preliminary calculations: 1.1,Vand VC- Step 6. Use a transient analysis in SPICE to observe the voltage waveforms of the circuit when driven by a difference-mode signal only. Use the method of Appendix A11.2 to create difference and common- mode input voltages for the circuit, but set the common-mode input to zero. The difference-mode input voltage should be a IV, sine wave at IkHz (you may need to select the right type of voltage source to create a sine wave in PSPICE for transient simulations). Set the final time of the transient analysis so that three cycles of the sine wave are displayed. Obtain a plot of view and vw and use the plot to verify that the input common-mode voltage is zero. Then, obtain a plot showing Vip Vc and Vee and comment on the phase relationship of Ves and Veto Vp: which is in phase with the input, which is out of phase? Finally, observe and describe the waveform at vx Step 7. From the simulation results of Step 6, calculate ACM Compare the simulated gain with the gain found in Step 3. Step 8. Use a transient analysis in SPICE to observe the voltage waveforms of the circuit when driven by a common-mode signal only. (set the difference-mode input to zero). The common-mode input voltage should be a IV sine wave at IkHz. Set the final time of the transient analysis so that three cycles of the sine wave are displayed. Obtain a plot showing Vo ve Vos and vc Comment on the phase relationship of ve, and Ved to vie, which is in phase with the input, which is out of phase? Observe and describe the waveform at Vy, and determine if there is any signal current flowing through Ry and Rp2 Step 9. Set the difference-mode voltage to zero and sweep the common-mode voltage (using DC analysis) from-10V to +10V. Identify on the plot the range of input common-mode voltage for which all of the transistors Q1-Q4 are operating in their forward-active regions. This range will be called the input common-mode voltage range (Note: If you have done the current mirror experiment, the input common mode voltage range is equivalent to what was called the operating range in that experiment.) Plot V., VE, Ves, and Vcs over the full sweep range, and either obtain a print-out or make a sketch of the plot. For a portion of the sweep well within the input common-mode voltage range, use the cursors in SPICE to find a small change in the output common-mode voltage AV that corresponds to a small change in the input common-mode voltage AVC. Note that the output common-mode voltage is the average of Vc and Ves. but since Vo=Vc either one by itself can be taken as the common-mode ΔΙ. output voltage Calculate OC How does this value compare to the small-signal common-mode gain calculated in Step 2? Need help with Pspice simulations. Thank you. AVC