- Multiplication Is One Of Major Operation Done By The Arithmetic Logic Unit In The Processor Figure 1 Shows A Hardware I 1 (181.98 KiB) Viewed 42 times
show ALL codes and OUTPUTS, along with the WAVEFORMS! Please only
do if you know how to do this question! This is all of the
information that I have. PLEASE DO NOT COPY FROM THAT OTHER CODE
THAT WAS POSTED HERE BECAUSE THAT CODE IS INCORRECT!
Multiplication is one of major operation done by the arithmetic logic unit in the processor. Figure 1 shows a hardware implementation for the multiplication unit, and Figure 2 shows the multiplication algorithm. Start Multiplicand Shift left 128 bits Multiplier = 1 Multiplier = 0 = 1. Test Multipliero 128-bit ALU Multiplier Shift right 64 bits Product Control test 1a. Add multiplicand to product and place the result in Product register Write 128 bits Figure 1. Multiplication Hardware 2. Shift the Multiplicand register left 1 bit 3. Shift the Multiplier register right 1 bit No: <64 repetitions 64th repetition? Yes: 64 repetitions Done Figure 2. Multiplication Algorithm In this project you implement this multiplier in Verilog or VHDL. Your implementation should be synthesizable, that is in can be downloaded into an FPGA and it then works correctly. Your submission should include the implementation code with a detailed explanation of each part of your code. The report should also include a test bench code to verify the correct operation of multiplier. The report needs to include annotated waveforms that show the internal operations of the multiplier.