There is a 8 bit binary counter, based on 74LS16x family. It presents on the output the next sequence periodically :11,1

[answerhappygod]

There is a 8 bit binary counter, based on 74LS16x family. It
presents on the
output the next sequence periodically :11,12,….69  75,76,…..131
207, 208,...225 
11,12,..
Design it!
At the 2nd and 3rd problem I suggest to do these steps:
1. Design the block- diagram of the network!
2. Specify the input and output signals of the blocks of the
block-diagram, and the tasks
of the boxes (what happens between the input and output signals of
the block) !
3. Design the logical network of the boxes (you have to apply the
signal-names of the
block-diagram!
You may apply any MSI circuits, which we studied (4 bit parallel
adder, 4 bit cascadable
comparator, 4 bit 7416x binary uo-counter,…) and the neccessary
number of
NAND/NOR/AND/OR/EXCLUSIVE_OR/INCLUSIVE_OR gates and SR/JK/DG/D/T
flip-flops.