Using counters, implement in Verilog a circuit that generates the following number sequence: 0, 1, 1, 2, 3, 5, 8, 13, 21

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Using counters, implement in Verilog a circuit that generates
the following number sequence:
0, 1, 1, 2, 3, 5, 8, 13, 21, 34, 55…
known as the Fibonacci sequence. The numbers must be presented
on the display of
7 segments and must reach at least number 55. Activation of
the
sequence will be activated by a Switch and must have a Reset.
(Show code and Simulation)
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