Question 45 4 pts A software routine is compiled for both RISC and CISC processars. The RISC version generated 30k instr

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Question 45 4 pts A software routine is compiled for both RISC and CISC processars. The RISC version generated 30k instr

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Question 45 4 Pts A Software Routine Is Compiled For Both Risc And Cisc Processars The Risc Version Generated 30k Instr 1
Question 45 4 Pts A Software Routine Is Compiled For Both Risc And Cisc Processars The Risc Version Generated 30k Instr 1 (25.04 KiB) Viewed 125 times
Question 45 4 pts A software routine is compiled for both RISC and CISC processars. The RISC version generated 30k instructions, while CISC version produced 20k instructions. If the average cycles per instruction (CPI) for RISC and CISC processors are 2.5 and 1 respectively, what is the comparative speedup between the architectures with a given clock frequency? Cydestaisa / Cydes(RISC) = 4 Cydes(RISCI / Cycles (CIC) - 3.75 Cycles(RISCI / Cycles CISC) = 0.375 Cycles(asa / Cycles(RISC) = 7.5
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