There is CMOS inverter, which consists of the following electrical parameters. Meff_N=215cm²/Vs, Heff_p=55cm²/Vs, Cox-2μ

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There is CMOS inverter, which consists of the following electrical parameters. Meff_N=215cm²/Vs, Heff_p=55cm²/Vs, Cox-2μF/cm², SS_N=SS_p=72mV/dec, V₁N=0.4V, V₁_p=-0.4V, ECNL=0.6V, ECPL=2.4V, Vsat=1E7 cm/s, VDD=1V, L=40nm, C₁=50fF Assume that effective current = DC current, so it is <In>=ln, </p>=lp). (5-1) Find WP/WN that satisfies TNTP (however, WP/WN is rounded to one decimal place) (5-2) Find WP and WN that satisfies TN=Tp=4ps using the result of (5-1). (5-3) Using the result of (5-2), draw a straight type inverter layout and draw a layout to reduce the parasitic drain junction capacitance in half (mark S/D/G/Well/Contact accurately) (5-4) The inverter above switched to 1GHz. Calculate active power at this time. Prob.5