Question 2 (25 marks) P S A four-stage static pipeline is shown in the Fig. 1 below: LNGT-Triggered Latch FL Functional

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Question 2 25 Marks P S A Four Stage Static Pipeline Is Shown In The Fig 1 Below Lngt Triggered Latch Fl Functional 1 (208.93 KiB) Viewed 45 times

Question 2 (25 marks) P S A four-stage static pipeline is shown in the Fig. 1 below: LNGT-Triggered Latch FL Functional Logic (asynchronous circuit L1 data †R1+R2† FL1 FL2 CLK delay Se On You MORS ins 20m Fig. 1 İ. Identify which FL has the longest propagation delay? Identify which FL has slowest component in the pipeline? Calculate the maximum operating frequency of the pipeline IV. Draw the timing diagram for statis pipeline system. Briefly explain two types of pipelines in a digital system. List 5 ways to increasing the rate of CPU's instruction execution. = +: [9 Marks] [3 Marks] [3 Marks] [3 Marks] [7 Marks] [4 Marks] [5 Marks]