design an FPGA-based system to display the queue number on the
seven-led-segment of the Basys-3 Board as well as send the queue
number to the Teraterm software installed on the computer using the
UART communication protocol (baud rate: 9600 bits/s, no parity, 1
stop bit). use a push button as the input for the system and
should use the debouncing circuit to remove the mechanical effect.
The design should guarantee that the queue value increases by one
unit for each press regardless of the pressing duration.
* design (block diagrams) and give a detailed description
* Developelop your VHDL code to implement your design
* Develop test benches to verify the code development of the
sub-blocks and the whole system. Capture the simulation
waveform where necessary
* Synthesize and implement on the Basys-3 board to test your
design
i can test this part my self
design an FPGA-based system to display the queue number on the seven-led-segment of the Basys-3 Board as well as send th
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