code of Verilog, I really have no ideas,
- Pls Someone Tell Me How To Write The Testbench Code Of Verilog I Really Have No Ideas 32 Bit Adder Module Adder Inpu 1 (58.12 KiB) Viewed 76 times
module adder(input [31:0] x,
input [31:0] y,
input ci,
output reg co,
output reg [31:0] s);
//write your code here
endmodule
//32-bit shifter
module shifter(input [31:0] x,
input [4:0] c,
input [1:0] op,
output reg [31:0] y);
//write your code here
endmodule
example, 11 (001)2, y sro be the lle Adder (15 pts) Implement a 32-bit adder. Input: < (32 bits), y (32 bits), ci (1 bit). Output: co (1 bit), and s (32 bits). This adder should calculate the result of x + y + ci, and send the result to s and also the carry to co. For example, if x = 0x00000001, y = 0xFFFFFFFF, and co = 1, then the output should be s = Ox00000001 and ci = 1. Shifter (15 pts) Implement a 32-bit shifter. Input: x (32 bits), C (5 bits), and op (2 bits). Output: y. This shifter should shift the input number x by c bits according to the shift operations indicated by op: op = 0 left logical shift, op = 1 right logical shift, op = 2 right arithmetic shift, and 3 op - 3 left circular shift. For example, if x=0x80000001 and c=4, the value of y should be 0x00000010 if op=0, 0x08000000 if op=1, 0xF8000000 if op=2, and 0x00000018 if op=3.