- Problem 3 4 Points Design A 4 Bit Alu For The Specifications In The Table Below This Unit Has A 2 Bit Control Lines P 1 (39.57 KiB) Viewed 14 times
operation, a 4-bit input data
D[3:0], and a 4-bit register
output Q[3:0]. Note: do not use any adder in the design.
a. Draw the block diagram for this ALU circuit. (2 points)
b. Write the verilog code for this circuit. You do not need to simulate this circuit, but you have to make sure it is free from syntax errors. Use the template below as a starting point. (2 points)
module alu4 (input clk, input [1:0] P, input [3:0] D, output reg [3:0] Q); // declare internal wires if needed
// here is your design always @(posedge clk)
begin
end endmodule // alu4
Problem 3 - 4 points Design a 4-bit ALU for the specifications in the table below. This unit has a 2-bit control lines P[1:0) to select the required operation, a 4-bit input data PP Operation D[3:0), and a 4-bit register Q=D 01 output Q[3:0). Note: do not Q* = Q (New Q is the invert of the current Q) Q-20 use any adder in the design. 11 Q-20+1 00 10 a. Draw the block diagram for this ALU circuit. (2 points) b. Write the verilog code for this circuit. You do not need to simulate this circuit, but you have to make sure it is free from syntax errors. Use the template below as a starting point. (2 points) module alu4 (input cik, input (1:0) P. input [3:0] D, output reg [3:0] Q: // declare internal wires if needed // here is your design always @(posedge clk) begin end endmodule // alu4