- 4 Lab Assignment 4 1 Synchronous State Machine Implementation 1 Produce A Next State Table Ensure That You Design You 1 (375.85 KiB) Viewed 15 times
graphs, truth tables, and actual multisim circuit. I have my own
final answer but I would really appreciate it for double-checking
purposes!
4. LAB ASSIGNMENT 4.1 Synchronous State Machine Implementation 1. Produce a Next-State Table. Ensure that you design your machine to be self- starting, such that any used states have a valid and reasonable next state. As in lecture, the left-hand side of your Next State Table should possess the same number of columns as the Sum of the Present State Variables (QO, Q1, etc.) and the number of inputs. The right-hand side of your Next State Table should possess the same number of columns as the Sum of the Next State Variables (QO, Q1, etc.). 2. Assuming D Flip-Flops are used to create the memory cells, develop the Sum- of-Product Expressions (SOP) necessary to implement the Input Forming Logic to each of the Flip-Flops. The Input Variables used for your Input Forming Logic should include the external Inputs (Left, Right, and Hazard) as well as the Q/Q* outputs from each of the Flip-Flops, as necessary. The outputs for the IFL are the D inputs to the Flip-Flops. 3. Minimize the IFL SOP expressions using K-Maps to simplify the logic needed to implement the Input Forming Logic. 4. Develop the necessary Output Forming Logic from the output of your States to drive 6 LEDs. Minimize the expressions, as necessary. 5. Build and test your system in Multisim, using your IFL and OFL equations as a guide. Note that the final output of your Synchronous State Machine should drive 6 LEDs to emulate the Tail-Light Section of the 1965 Thunderbird. Use variable digital constants for the Boolean Inputs (LEFT, RIGHT, HAZARD), and a function generator output as your Input Clock. 6. Demonstrate your working circuit to your instructor. 7. Document your entire design process. Page 4 of 5