3. Another digital computer has 16-bit long (Iis - Io) instruction format which consists of: 1.4-bit op code (Iis - 112)

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3 Another Digital Computer Has 16 Bit Long Iis Io Instruction Format Which Consists Of 1 4 Bit Op Code Iis 112 1 (16.82 KiB) Viewed 10 times

3 Another Digital Computer Has 16 Bit Long Iis Io Instruction Format Which Consists Of 1 4 Bit Op Code Iis 112 2 (17.35 KiB) Viewed 10 times

3 Another Digital Computer Has 16 Bit Long Iis Io Instruction Format Which Consists Of 1 4 Bit Op Code Iis 112 3 (41.46 KiB) Viewed 10 times

3. Another digital computer has 16-bit long (Iis - Io) instruction format which consists of: 1.4-bit op code (Iis - 112) and the decoded signal for RRI and I/OI is q1s=1111. 2. Iu=1 for RRI and lu=0 for I/OI. 3. For both the RRI and I/Of the rest of the instruction bits (110 - Io) represent the Operation Control Field.
a) Draw the the Register Reference Instruction (RRI) format for this computer with every field clearly identified and named b) There are 20 Register Reference Instruction operations which are listed in Table 6. attached. Fill the "Assigned bits" column with bits from the Operation Control Field (e-le) that you select to identify each RRI operation and then fill the "Instruction in Hex column for each operation e) Based on the information you filled in the table, list the micro-operations along with their control functions for the following three instructions, BRI are fetched in Fetch eyele (Ce) and executed in the Execute cycle (CI). 1. SPA Skip ir ACC is positive 2. SIXT Swap Accumulator and Index Register 3. IXIZ increment XR1 and skip if ZERO
castleman talettam Instruction Instruction in Hex) Assigned bits To identify instruction 1. 2 3. 4. 5. 6. 74 8. 9. 10. 11. 12. CLA (Clear Accumulator) CLE (Clear Carry) CMA (Complement Accumulator) CME (Complement E) CIR (Circulate Accumulator Right through Carry) CIL (Circulate Accumulator Left through Carry) INC (Increment Accumulator) SPA (Skip if Accumulator is Positive) SNA (Skip if Accumulator is Negative) SZA (Skip if Accumulator is Zero) SZE (Skip if Carry is Zero) HLT (Halt Computer) SIX1 (Swap Accumulator and Index Register 1) SIX2 (Swap Accumulator and Index Register 2) SIX3 (Swap Accumulator and Index Register 3) SBR (Swap Accumulator and Base Register) IX1Z (Increment IX1 and Skip if Zero) IX2Z (Increment IX2 and Skip if Zero) IX3Z (Increment IX3 and Skip if Zero) DX1Z (Decrement IX1 and Skip if Zero) 13. 14. 15. 16. 17. 18. 19. 20. Register Refernce Instruction Operations Table 6