- Verilog Module Design 1 (82.68 KiB) Viewed 26 times
Verilog Module Design
-
answerhappygod
- Site Admin
- Posts: 899603
- Joined: Mon Aug 02, 2021 8:13 am
Verilog Module Design
Verilog Module Design
Question The Lucas sequence has the same recursive relationship as the Fibonacci sequence, where each term is the sum of the two previous terms, but with different starting values. The first few Lucas numbers are 2, 1, 3, 4, 7, 11, 18, 29, 47, 76, 123, .... The Lucas numbers may thus be defined as follows: 2 if n = 0; Ln=1 if n = 1; Ln-1 + 1-2 ifn > 1. (where n belongs to the natural numbers) From given information design a model which calculates each Lucas number. Your model must use a single port RAM and needs to read Ln-1 and Ln-2 from you RAM and write back the newly found Lucas number. Example block design is given below. Assume your RAM is empty. (HINT: Due to this you need to write initial conditions into RAM first). You do not need to design a RAM only design Lucas Number block. -{.. output input Lucas Number Single Port RAM Address TORAM DataTORAM DataFromRAM WriteEnable Clock Reset a) Explain for how many states you need and what are you going to implement in that given each state (20 points) b) Create inputs, outputs and necessary registers and sequential block for this design (10 points) c) Rest of the design (70 points) d) BONUS: create a testbench for your design. In your testbench you can call single port ram as singlePortRAM (10 points) ONLY UPLOAD YOUR DESIGN! NOT THE WHOLE PROJECT!
Question The Lucas sequence has the same recursive relationship as the Fibonacci sequence, where each term is the sum of the two previous terms, but with different starting values. The first few Lucas numbers are 2, 1, 3, 4, 7, 11, 18, 29, 47, 76, 123, .... The Lucas numbers may thus be defined as follows: 2 if n = 0; Ln=1 if n = 1; Ln-1 + 1-2 ifn > 1. (where n belongs to the natural numbers) From given information design a model which calculates each Lucas number. Your model must use a single port RAM and needs to read Ln-1 and Ln-2 from you RAM and write back the newly found Lucas number. Example block design is given below. Assume your RAM is empty. (HINT: Due to this you need to write initial conditions into RAM first). You do not need to design a RAM only design Lucas Number block. -{.. output input Lucas Number Single Port RAM Address TORAM DataTORAM DataFromRAM WriteEnable Clock Reset a) Explain for how many states you need and what are you going to implement in that given each state (20 points) b) Create inputs, outputs and necessary registers and sequential block for this design (10 points) c) Rest of the design (70 points) d) BONUS: create a testbench for your design. In your testbench you can call single port ram as singlePortRAM (10 points) ONLY UPLOAD YOUR DESIGN! NOT THE WHOLE PROJECT!