Please Help Answering This Questions Thank You 1 (47.42 KiB) Viewed 57 times
Question 12 12 pts For the next several questions, refer to the following diagram showing the implementation of direct- mapped cache. Address (showing bit positions) 31 10 Byte offset Hit Tag Index Data Valid Tag Data Index 0 1 2 II 1021 1022 1023 32 The address is split into several pieces. How many bits for the byte offset? How many bits for the index? How many for the tag?
Question 13 6 pts What is the purpose of the AND gate and Equality operations shown in the diagram? Edit View Insert Format Tools Table 12pt Paragraph B | BIU A 2 T² : p р O words </>
Join a community of subject matter experts. Register for FREE to view solutions, replies, and use search function. Request answer by replying!