Spring 2022 10 (a) (4 pts) We need to implement a 9-bit shift register using the below logic block. What is the minimum
Posted: Sat May 14, 2022 8:08 pm
Spring 2022 10 (a) (4 pts) We need to implement a 9-bit shift register using the below logic block. What is the minimum number of logic blocks to map a 9-bit shift register? X1 X₂ X3- X Function Generator ox CEFF LUT4 Y Function Generator T -QY CEFF LUTA (b) (6 pts) What are the values of three configuration bits (OUT INVERT, 3-STATE INVERT, and LATCHED OUTPUT) to enable the gray/bold path? Those M bits (marked as ??) should be programmed for OUT SIGNAL to send to 1/0 PAD. CONFIGURATION BITS 3-STATE OUT (OUTPUT ENABL) NVERE M M 3-STATE INVERT M LATCHED OUTPUT SEW RAIE M PASSIVE PULLUP M M 22 22 92 0 1 OUT SIGNAL D Q MUX OUTPUT BUFFER ENABLE FLP FLOP CE R VOPAD