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solution if you are able to solve it!
A synchronous sequential circuit is to be designed having a
single input X and a single output Y to detect single change of
level (from 0 to 1 or from 1 to 0) in a 3 bit word a
produce an output Y=1, otherwise Y=0. When a new 3-bit word is
to come, the circuit must be at its initial (reset) state and there
should be a time delay of one clock cycle between the words. Draw
the state diagram, draw the reduced state diagram, state
transmission and output table
Please read the whole question first, then send a solution if you are able to solve it! A synchronous sequential circuit
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Please read the whole question first, then send a solution if you are able to solve it! A synchronous sequential circuit
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