Tag Line:1 Event Consequence set:0 Tag Line:2 RAM Block number, address: j=quotient generated by address/block CPU size)

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answerhappygod
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Tag Line:1 Event Consequence set:0 Tag Line:2 RAM Block number, address: j=quotient generated by address/block CPU size)

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Tag Line 1 Event Consequence Set 0 Tag Line 2 Ram Block Number Address J Quotient Generated By Address Block Cpu Size 1
Tag Line 1 Event Consequence Set 0 Tag Line 2 Ram Block Number Address J Quotient Generated By Address Block Cpu Size 1 (109.04 KiB) Viewed 45 times
Tag Line 1 Event Consequence Set 0 Tag Line 2 Ram Block Number Address J Quotient Generated By Address Block Cpu Size 2
Tag Line 1 Event Consequence Set 0 Tag Line 2 Ram Block Number Address J Quotient Generated By Address Block Cpu Size 2 (111.57 KiB) Viewed 45 times
Tag Line:1 Event Consequence set:0 Tag Line:2 RAM Block number, address: j=quotient generated by address/block CPU size) Check cache for block j Tag Line: 1 5 i=5/4 = 1 Not found Cache miss RAM BLOCK1 Block-1 of RAM is transferred into set- 1, say, line-1 (s=1 MOD 8=1) set: 1 Tag Line: 2 RAM BLOCK.9 6 j=6/4 = 1 found Cache Hit 37 j= 371459 Not found Cache Miss Tag CPU reads from cache; set-1, line-1 Block-9 of RAM is transferred into set- 1. say, line-2 (s=9 MOD 8=1) CPU reads from cache; set-1, line-2 38 j= 38/459 found Cache Hit

. Problem: Assume a Computer design problem having following parameters: Main memory: 1KB, 2-way Set-Associative mapped cache, Cache size: 16 lines, Block size: 4 Bytes. Computer program accesses (in order) memory locations: 5, 6, 37, 38, 69, 70, 203, 204, 205. (i) What is the hit ratio? (ii) What are the final cache contents? Assume that the cache is empty at the beginning.
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