4. (a) (12 points) Consider a minimum sized inverter (INV1) with Wn = 1 and Wp = a, driving a load capacitor CL. The input capacitance of the inverter is Cin such that Cl/Cin = x and the switching delay is too. Ignore wire and output capacitances. Wp= a INV1 Cin Wn=1 CL = x. Cin (i) (4 points) Let us change INV1 to a second inverter (INV2) such that the transistor widths of INV2 are Wn = u and Wp = a.u. INV2 now drives the load capacitance Cl. Determine the switching delay in terms of tpo, x and u) of INV2 as it drives CL. Wp= a.u INV2 CL Wn=u u Hint: From the CV/I model of the delay, we known that delay in proportional to the capacitance and inversely proportional to the current. You can use this knowledge to determine the relationship between the delay in terms of tpo, x and u.
(ii) (4 points) Next INV1 is connected such that it drives INV2 as shown below. Determine the switching delay (in terms of tpo, x and u) of INV1 which now drives INV2. Wp= a Wp= 0.u INV1 INV2 Wn= 1 Wn= u
(iii) (4 points) Now consider the chain of the two inverters driving the load capacitance. The total delay (i.e., sum of the delays of INV1 driving INV2 and INV2 driving CL) is obtained by adding the results from (i) and (ii). Find the optimal value of u (in terms of x) such that the total delay is minimum. Wp= a Wp= a.u INV1 som INV2 Wn=1 Wn= u CL
4. (a) (12 points) Consider a minimum sized inverter (INV1) with Wn = 1 and Wp = a, driving a load capacitor CL. The inp
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4. (a) (12 points) Consider a minimum sized inverter (INV1) with Wn = 1 and Wp = a, driving a load capacitor CL. The inp
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