I Need VHDL code ,Testbench CODE for the following question please. Its urgent. Please send codes.

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I Need VHDL code ,Testbench CODE for the following question
please. Its urgent. Please send codes.

I Need Vhdl Code Testbench Code For The Following Question Please Its Urgent Please Send Codes 1 (59.76 KiB) Viewed 36 times

PURPOSE - In this lab you will design a casino-type game using a random number generator Part 1: Design of Random Number Generator PURPOSE - In this section of the laboratory work you will design a Random Number Generator. 1. Introduction In many real applications, such as electronic measurements (signature analyzers), communications, random (or better said pseudo random) number generators are needed. This laboratory is dedicated to designing a random number generator whose block diagram is shown in the figure below: 11₂ D FF (+) OFF+ (+) D FF + D FF Xo X₂ n-2 X₁ 'n-1 This circuit is known as an autonomous "Linear Feedback Shift Register" (LSFR). In particular, the circuit presented here is called generic modular LSFR. There are also other types of LSFR's. It has to be mentioned that this circuit is a pseudo random number generator due to its discrete nature. In LESR hi is a binary constant, and hi = '1' implies that a connection exists, while hi = '0' implies that no connection exists. Not every binary combination of the vector H is a good one. Usually, the vector H is taken from existing tables for any particular value of n. An encircled '+' symbolizes an XOR gate.
Part 2 Game specification: Display PRN Generator Adder Display Sum Game module Control start Roll D₁ Win Test D logic DR513 Lose Point register Comparator Sp Try Again You will have to design a game whose specifications are as follows: The inputs to the game are Rb ( roll button) and Reset. Reset is used to initiate a new game. When RB is pushed the random number generator will start generating numbers without displaying them until the roll button is released. When the Roll button is released, the controller will compare the two the 4-most significant bits and the 4- least significant bits of the generated number) and declare a win if the sum is 7 or 11, a no-win if the sum is 8, 5 or 13 otherwise the sum is stored in a point register and the player is allowed another attempt. If the new value is equal to the value stored in the point register, then the player wins, else he loses. The output of the game (PRN) should be driving two 7-segment LEDs. Hand in VHDL code for part 1 and 2. Including the design code, test bench and simulation results Rb Reset.