Q1. Determine whether each of the following statements is True or False? 2 points Super computers rely on parallelism to achieve very high performance for high end applications. b. In PostPC cra, the cloud server is only used for storage and all applications must be installed on the PMD c. A CPU is designed with two adders, where only one adder is used for execution and the other one is used a spare in case the first adder becomes faulty. This is an example of improving performance via prediction d. Flash drive is faster and more expensive than the traditional magnetie disk drive. Q2. CPU-I and CPU-2 have the same ISA and same compiler. The ISA has three instruction types: A, B, and C. The CPI for cach instruction type in CPU-1 and CPU-2 are given in the table below. ProgramX is executed on both CPUs. The relative frequency of each instruction type in ProgramX is also given in the table. Answer the following questions: <3 points A a Compute CPL for ProgramX when executed on CPU-1 CPU-I CPI and CPU-2 CPU-2 CPI ProcramX Instruction% 20% 40% 40% CPU-I CPI CPU-2 CPI b. Given that the Clock Rate of CPU-1 is 3 times the Clock Rate of CPU-2, which CPU has better performance when executing ProgramX? and by how much?
+ | Pageview | A Read aloud | Add textDraw 5 $ 03. The compiled versions. (Version-1 and Version-2) of the same program are executed on the same CPU The IC for each instruction type in Version 1 is given in the table. The CPI for each instruction type is given as well. Answer the following questions <3 po a. How many cleck croes are needed for Version 1? Instruction Type 1 ABCD Version 1 IG 36212 AL CPI 41521 Version-1 Clock Cycles . Given that the performance of Version-2 is times the performance of Version 1. how many clock -. sules are needed for Version 2 Version-2 Clock Cycles 2 04. Answer the following short questions: Convert the following C-statement into RISC-V assembly language. Assume thar "" is an array of long long integers and its base address is mapped to register x </ po B[5] - 0 RISC-V Assembly Convert the following C-statement into RISC-V assembly language. Assume that variable Wis mapped to register x20 and wariable Y is mapped to register x/0. < por WY: RISC-V Assembly c. Convert the following RISC-V machine code instruction into assembly language. A list of opeodes and -V . function fields is given on the right. 2 point Machine code instruction 00000000111100111101001010010011 Instruction Opcode Funct3 Opcode Dunct.3 Funcio GF Functo or Funct7 ad 0110011 CO OVOUDTUD th OUKKOON 001 be TORTO ma 001001 CHO 0010011 001 OXED 0010011 101 OOOO00 RISC-V Assembly - a
Q1. Determine whether each of the following statements is True or False? 2 points Super computers rely on parallelism to
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Q1. Determine whether each of the following statements is True or False? 2 points Super computers rely on parallelism to
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