Given the Datapath \& control diagram in Figure 1, complete the values expected at every I/O signal in the Instruction Memory Unit, the Register File Unit, the Control Unit \& Data Memory Unit for the following sequence of instructions: LDUR X19, [ X9,#16] ADD X5, X19, X9 Assume the following initial value for the registers: X5 =0×0000000000000123x9=0×0000000000000032X19=0×0000000000000512 PC =0×0000000000000008 Also assume every instruction is executed in sequential order, the pipeline handles any potential data hazards (register updates from previous instruction will be available for next instruction) and data read from ANY memory location returns value 0x25 You must provide your solution in a table format. Every value in hexadecimal. See example below as a reference:
Figure 1 Datapath and Control Diagram
Given the Datapath \& control diagram in Figure 1, complete the values expected at every I/O signal in the Instruction M
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Given the Datapath \& control diagram in Figure 1, complete the values expected at every I/O signal in the Instruction M
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