Write a module to detect if two 4-bit inputs, a and b, are the same. You will complete this problem in stages. The 1-bit

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Write a module to detect if two 4-bit inputs, a and b, are thesame. Youwill complete this problem in stages. The 1-bit output should becalled “eq”. It should betrue (1) when they are equal, and false (0) otherwise.(a) First, draw a truth table for a 1-bit equality comparison(i.e., what the output eq shouldbe if a and b were 1-bit signals.(b) Now sketch a circuit to implement part (a).(c) Extend your circuit so that a and b are 4-bit signals. Rememberthat the ouput, eq, is a1-bit signal.(d) Now implement your design from part (c) using SystemVerilog