Q2 Select The Right Answer No Penalty If Wrong Selection 1 For A 10 Bit Number The Range Is A 2 E 2 D 2 2 27 2 1 (46.08 KiB) Viewed 69 times
Q2 Select The Right Answer No Penalty If Wrong Selection 1 For A 10 Bit Number The Range Is A 2 E 2 D 2 2 27 2 2 (53.81 KiB) Viewed 69 times
Q2 Select The Right Answer No Penalty If Wrong Selection 1 For A 10 Bit Number The Range Is A 2 E 2 D 2 2 27 2 3 (43.35 KiB) Viewed 69 times
Q2. Select the Right Answer (No Penalty if wrong selection) 1. For a 10 bit number, the range is a. 2⁰ e-2 d. 2 2.27 2. 3. to to to to to f. None of the above 2. If we use a 64 Register fe in USC., and assuming the same instruction then the maximum number of OP Codes possible could b 1. 2 3. 25 4. 2 5. None of 3. For a given program and a number of N-processors that can be used on where the program is composed of parallel and sequential part), and if speed up is K, then the relation between N and K is: 2. N2K 3. N<K 1. N>K mentioned 4. NSK 5. N 4. The RISC-V instruction format can be categorized as 1.6 2. 3 3. 32 4.4 +25 *2*1 5. Shifting a register by 4 positions to the left is equivalent to: 1. Multiplying the content by 4 Multiplying the content by 2 Multiplying the content by 16 4. Dividing the content by 4 5. None of the above. The Memory in the RISC-V system can ha a. 64 Int types: 5. None of 6. Two Processors A and B, where A has a cycle time of 250 ns and a C Processor B has a cycle time of 500 ns and a CPI of 1.2; and if the pre instructions, then: 1. Processor A is faster than Processor B by 12% 2. Processor B is faster than Processor A by 20% 3. Processor A is faster than Processor B by 20% 4. Processor B is faster than Processor A b 5. None of the mentioned
5. Shifting a register by 4 positions to the left is equivalent to: 2. 1. Multiplying the content by 4 Multiplying the content by 2 Multiplying the content by 16 Dividing the content by 4 5. None of the above. 3. 4. 6. Two Processors A and B, where A has a cycle time of 250 ns and a C Processor B has a cycle time of 500 ns and a CPI of 1.2; and if the pr instructions, then: 1. Processor A is faster than Processor B by 12% 2. Processor B is faster than Processor A by 20% 3. Processor A is faster than Processor B 4. Processor B is faster than Processor A b 5. None of the mentioned 7. The Memory in the RISC-V system can ha a. 64 Instructions b. 232 Instructions c. 262 Instructions d. (264-1) Instructions e. None of the Above by 20% I
8. Registers in RISC-V will overflow when the content reaches: a. +264 b. between the range: -263 to +203-1 C. 232 d. -263 e. 64 x 32 f. None of the above 9. For a memory that is organized as word, the total number of words that RISC-V access is: a. 264 b. 2 62 C. 64 d. 32 e. None of the above 10. The address range of the memory in RISC-V is given by (in HEX): 0000 to FFFF H 000000 to FFFFFF H C. 00000000 to 7FFFFFFF H d. 00000000 to FFFFFFFF H NONE OF THE ABOVE e. a. b.
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