Experiment 19 Setting Up a Stable Q Point To achieve a stable Q point, either voltage-divider bias or two-supply emitter

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Experiment 19 Setting Up a Stable Q Point To achieve a stable Q point, either voltage-divider bias or two-supply emitter

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Experiment 19 Setting Up A Stable Q Point To Achieve A Stable Q Point Either Voltage Divider Bias Or Two Supply Emitter 1
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Experiment 19 Setting Up A Stable Q Point To Achieve A Stable Q Point Either Voltage Divider Bias Or Two Supply Emitter 2
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Experiment 19 Setting Up A Stable Q Point To Achieve A Stable Q Point Either Voltage Divider Bias Or Two Supply Emitter 3
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Experiment 19 Setting Up A Stable Q Point To Achieve A Stable Q Point Either Voltage Divider Bias Or Two Supply Emitter 4
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Experiment 19 Setting Up a Stable Q Point To achieve a stable Q point, either voltage-divider bias or two-supply emitter bias is required. With either of these stable blasing methods, the effects of he variations are virtu ally eliminated Voltage-divider bias requires only a single power supply. This type of bias is also called universal bias, an indication of its popularity. When two supplies are available, two-supply emitter bias can provide as stable a Q point as voltage-divider bias In this experiment, circuits utilizing both types of bias will be constructed and the stability of their Q points will be verified. GOOD TO KNOW The de beta (B) is listed as her on the transistor date sheet. Required Reading Chapter 7 (Secs. 7-5 to 7-8) of Electronic Principles, 8th ed. Equipment 2 power supplies: 15 V 3 transistors: 2N3904 (or equivalent) 5-W resistors: 1 kf, 2.2 kf, 3.9 kf, 8.2 kf, 10 kf 1 DMM (digital multimeter) Procedure VOLTAGE-DIVIDER BIAS 1. Measure and record the values of the resistors. In Fig. 19-1, calculate V₂, Vs. and Ve Record the answers in Table 19-1. 2. Build the circuit of Fig. 19-1, Measure and record the quantities listed in Table 19-1. 3. Repeat Steps 1 and 2 for the other transistors. If Mul- tisim is being used, change the B of transistors 2 and 3 to 250 and 150, respectively. Emitter Base Colector A₁₂ 10 kn > R₂ 220> Figure 19-1 Voc 15 V Re 39kn Q₁ 2N3904 3R₂ >100 EMITTER BIAS 4. In Fig. 19-2, calculate V. V. and Ve Record the answers in Table 19-2 5. Build the emitter-biased circuit of Fig. 19-2. Measure and record the quantities of Table 19-2. 6. Repeat Steps 4 and 5 for the other transistors. 101
Ra 220; 102 Figure 19-2 Vec TO V Ro $3.90 2N3904 ŚRE Ver 82K -10V TROUBLESHOOTING 7. In Fig. 19-1, assume that R, is open. Estimate and record the collector voltage Ve in Table 19-3. 8. Repeat Step 7 for the other troubles listed in Table 19-3. Build the circuit of Fig. 19-1 with each trouble listed in Table 19-3. Measure and record the collector voltage. CRITICAL THINKING 9. Design a stiff voltage-divider biased circuit to meet the following specifications: Vec 15 V, le=2 mA. and Ve-7.5 V. Assume an Arg of 200. Calculate and record the quantities listed in Table 19-4. 10. Build the design. Measure and record the quantities of Table 19-4. ADDITIONAL WORK (OPTIONAL) 11. Assume B-172 for the eminer-feedback biased circuit of Fig. 19-3. Calculate and record V. V. and Ve on a separate piece of paper. (Use a table similar to Table 19-1 for your data) 12. Build the circuit of Fig. 19-3. Measure and record V V₂, and Ve 300 k Figure 19-3 GOOD TO KNOW Since for lo R₂ ww 100 k Voc Figure 19-4 13. Compare the measured values to the calculated valu What does this say about B? 14. Repeat Steps 11 to 13 for the collector-feedba biased circuit of Fig. 19-4. <Ro Voc 15 V and fell can be substituted le-B/₂-1-1/3+1) 1k0 Re >100 15 V Q₁ 2N3904 0172 Ac 2130 Q₁ 2N3904 -172
ME Kirkland Harrison. NAME Experiment 19 Lab Partner(s) PARTS USED Measured Value PARTS USED Nominal Value Nominal Value 1 kn 8.2 k 10 kn 2.2 kn 3.9 kn 2.16kr 3.93KA TABLE 19-1. VOLTAGE-DIVIDER BIAS Transistor 1 2 3 TABLE 19-2. EMITTER BIAS Transistor 1 2 3 Trouble Open R₁ Shorted R Open R₂ Shorted R₂ Calculated V₂ VE Ve 1.80v 1.10v 5.v 1.90v 1.10 5.71V 1.500 1.100|5.71V TABLE 19-3. TROUBLESHOOTING Open Re Shorted Re Open Re Shorted R Open C-E Shorted C-E V₂ Calculated V₂ tors V₂ titan Vc V₂ Estimated Ve Measured Value 8.13K1 10.04kr Multisin Ve Multisim VE Measured Ve IN Measured Actual V₂ V₂ Ve 2.63 1.930 7.72 2.62.01.9847.30 2.6427,350 Ve V₂ DATE Actual V₂ Multisim CALCULATIONS Vc -7.69-992-2.EN -1.50-9A1203 Measured Ve Actual 15v 15V 29.5mV 150 3.4v 103
TABLE 19-4. CRITICAL THINKING Values: R₁- R₂- Transistor 1 2 3 Re= Re Calculated Ve Multisin Questions for Experiment 19 1. Ideally, the voltage divider of Fig. 19-1 produces which of the following base voltages: (a) 0 V; (b) 1.1 V. (c) 1.8V; (d) 6.03 V 2. The measured emitter voltage of Fig. 19-1 was closest to (a) 0V; (b) 1.1 V (c) 1.8 V (d) 6.03 V 3. The measured collector voltage of Fig. 19-1 was closest to (a) OV (b) 1.1 V (c) 1.8 V (d) 6.03 V 4. The base voltage measured in Fig. 19-2 was: (a) OV 104 10. Optional. Instructor's question. Error TROUBLESHOOTING 7. Name all the troubles that were found to produce a collector voltage of 10 V. Measured Ve Actual (b) slightly positive: (c) slightly negative; (d) -0.7 V 5. With both voltage-divider hias and emitter bias, the measured collector voltage was approximately: (a) constant; the base voltage. (b) negative: (c) unstable, (d) one Var drop less than 6. What was discovered about the Q point of a circuit that uses voltage-divider bias or emitter bias? ( )C ()B ()D (A (A 8. What collector voltage was measured with a shorted collector-emitter? Explain why this value occurred. CRITICAL THINKING 9. Compare the measured Ve with the calculated Vein Table 19-4. Explain why the measured and calculated values differ. % Error
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