Questions for each input signal (A, B, C) in the figure above, what operation (if any) should be performed to obtain the corresponding output signal in the figure? Answer Jexpand as needed) Use ACT2_IMPLEM_SignalAlignment 1 to implement a circuit performing the required operation on each input signal. This file includes a signal generator that can be used in your implementation, no other signat generatoris allowed in your circuit. Any block you need not comprising a signalgenerator can be included from your library Circuit implementation goes here. How to copy-paste your implementation into the report: Open simulink file 2. Centre and wom by pressing the spacebar 3 COPY from simulinkfile from dropdown menu select: EDIT / COPY CURRENT VIEW TO CUPBOARD / BITMAP 4 Paste into doc file: Select "Paste" from the Paste Menu or press "Ctr V.Resize as appropriate Figure 21 Sipral Alignment version Implementation
Circuit output goes here. How to copy-paste your output into the report: 1. Open simulink TEST file. 2. Arrange block(s) and properly label all input wires going into output SCOPE(S) 3. Run the simulation (press PLAY button: /> ) 4. Double-dick on the output scope; this operis the output window 5. Select the window to copy press ALT+PrtScn and then fliste into the word document as an image ("Paste Menu / Paste Special / Enhanced Metafile"). Resize as appropriate Figure Signal Alignment version Output aligned signal
Signal A X1 Aligned Signal A 2 Signal B X2 3 Signal Aligned Signal B ZAAZ CLK Oto 1 LỘ 5 THỂ Bin Scope 4 var X3 Aligned Signal
#Part 1 begins 1.1 Use of Flip Flops as "delay units Signal alignment version 1 Consider the signals A, B and C in Simulink file ACT2_TEST_SignalAlignment_1, reported in Figure 1 below. The signals shown on the left side of the figure are the input signals to your system; the signals on the right side are the output of your system. Note the alignment of the output signals Ein Scope 32 0 х Bin Scope ) var X Ele Jools View Simulation Help File Tools View Simulation Help O. DOP 9.NF. BOD 3. H 2. NA Wonde Algie Seriehbase. To 005 Ready Send T-6.006 Input signals Required output signals aligned with A and Figure 1 Input and output sipas in AC 2TEST Sinalment1 #Part 1 begins 1.1 Use of Flip Flops as "delay units Signal alignment version 1 Consider the signals A, B and C in Simul
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