- Table 4 Shows A Truth Table For Logical Functions Fx And Fy Fx Gives A 2 Bit Non Negative Binary Integer Number X X1 1 (110.41 KiB) Viewed 37 times
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Table 4 shows a truth table for logical functions fx and fy: fx gives a 2-bit non-negative binary integer number X = (x1,xo)2, and fy gives a 1-bit binary number Y = (yo)2, respectively, when 2- bit non-negative binary integer numbers A = (27, )and B = (b1,bo)2 are given as inputs. Here, 21,20, bu, bo, x1,xo.70 € (0,1), and Oz denotes the value of a binary number. Answer the following questions using , +, -, and operators for the logical conjunction (AND), disjunction (OR), negation (NOT), and exclusive OR (EXOR), respectively. (1) Show a logical formula for fy in the minimum sum-of-products form using AND, OR, and NOT operators. (2) Draw a logic circuit for fy using 3-input NOR gates only. (3) The following sentence should explain the function of fr. Give a brief description suitable for filling the box using A and B. "The logical function fr gives Y = 1 when otherwise Y = 0." (4) Fig. 4(a) shows a circuit symbol for a half adder HA, whose inputs are Ph and OH (0,1), and outputs are a sum SH € (0,1} and a carry to the next stage CE (0,1). Draw a logic circuit for the half adder HA using 2-input EXOR and 2-input AND gates only. (5) Draw a circuit diagram for fx using half adders HA and 2-input AND gates only. Here, minimize the total number of half adders and AND gates. (6) Let Z = A x B = (23,22,21,20)2 where x denotes arithmetic multiplication, and 23,22,21,20 € (0,1). Draw a circuit diagram which outputs 22 using half adders HA and 2-input AND gates only. Here, minimize the total number of half adders and AND gates. (7) Fig. 4(b) shows a circuit symbol for a full adder FA whose inputs are Pp, QF E {0,1), and a carry from the former stage Cg € (0,1), and outputs are a sum Sp E {0,1} and a carry to the next stage CN € (0,1). Draw a circuit diagram for the full adder FA using half adders HA and 2-input OR gates only. Here, minimize the total number of half adders and OR gates. (8) Let W = A - B = (W1, wo)2 for inputs A and B which satisfy Y = 1. Here, denotes arithmetic subtraction, and W1, Wo € (0,1). Draw a circuit diagram for W using full adders FA and 2-input EXOR gates only. Ignore the inputs A and B which give Y = 0, and minimize the total number full adders and EXOR gates.