- Q2 50 Points Using Two 4 Bit Registers R1 And R2 And Any Logic Gates Or Components Mux Decoder Encoder Adders 1 (63.56 KiB) Viewed 43 times
Q2) [50 points] Using two 4-bit registers R1 and R2, and any logic gates or components (Mux, Decoder, Encoder, Adders, .
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Q2) [50 points] Using two 4-bit registers R1 and R2, and any logic gates or components (Mux, Decoder, Encoder, Adders, .
Q2) [50 points] Using two 4-bit registers R1 and R2, and any logic gates or components (Mux, Decoder, Encoder, Adders, ... etc), design a logic circuit that implements all of the following statements: Co: R2 B 0 (Clear R2 synchronously with the clock) C: R2 B R1 R2 (Content of R1 XORed with the content or R2) C2: R2 B R1 (Transfer R1 to R2) Cz: R2 B-R1 (2's complement of R1) The control variables are mutually exclusive (i.e., only one control variable can be equal to 1 at any time while the other three are equal to 0). Note: use 1-block for each 4-bit register (no need to make 4-Flip Flops and show the internal connections of the register. Example below: A 4-bit Register Block