Question 20 5 pts A processor's memory hierarchy has 3 level caches, followed by the main memory. Below are the miss rat
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Question 20 5 pts A processor's memory hierarchy has 3 level caches, followed by the main memory. Below are the miss rat
Question 20 5 pts A processor's memory hierarchy has 3 level caches, followed by the main memory. Below are the miss ratios and latencies experienced by an application: 1 miss ratio = 0.6 L1 hit latency = 4 CPI L2 miss ratio=0.4 2 hit latency = 10 CPI L3 miss ratio=0.35 L3 miss latency - 300 CPI 1.3 hit latency - 30 CPI What would be the effective processor performance in terms of CP) for the application?