10 of 12 6.2) The summing amplifier with the R-2R ladder of resistances shown produces the output Vout F +++일 where, the

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10 of 12 6.2) The summing amplifier with the R-2R ladder of resistances shown produces the output Vout F +++일 where, the D's take the value 0 or 1. The digital inputs could be TTL voltages which close the switches on a logical 1 and leave it grounded for a logical 0. This is illustrated for 4 bits, but can be extended to any number with just the resistance values R and 2R. Veel O www www www 2R Dy 28 2R PD, да 1909 1909 10:09 19.09 a) Assuming R, -2R and VREF=8V, determine the analog output voltage when input digital patterns at D's are: Inputs Output D3 D2 DI DO VOUT 1 1 0 0 0 0 0 1 0 0 1 1 b) Verify and confirm that (full scale voltage) VFs - ILSB + VOUT (max) D. 2.R 28 www RI 2 ||