1. There is a complex logic gate. Each MOSFET has R turn-on resistance. (1) Write the expression of the following schema
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1. There is a complex logic gate. Each MOSFET has R turn-on resistance. (1) Write the expression of the following schema
1. There is a complex logic gate. Each MOSFET has R turn-on resistance. (1) Write the expression of the following schematic Z. (2) Assume that Cn = capacitance at source/drain of nFET, Cp = capacitance at source/drain of pFET. Calculate C₁, C2, C3, C4, and COUT with CL, Cn and Cp. (3) What is i) the value of A, B, C, and D and ii) time constant of the worst case fall time (discharging)? The value should be one of 1, 0, 1-0, or 01 (10 points). of the worst case rise (4) What is i) the value of A, B, C, and D and ii) time constant time (charging)? (10 points) (5) Re-size the nFETs and pFETs. Assume that width of nFETs and pFETs are 2 and 4 um, respectively. A с DE PFET nFET (6) Calculate time constant again for fall time and rise time. Assume that C₁-C4 are not changed. D C3 с COUT CL A B B C₂ A 0-10 D E Z
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