The register file shown in Figure-1 is a 16-register x 32-bit three-ported register file built from a three-ported memor

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The Register File Shown In Figure 1 Is A 16 Register X 32 Bit Three Ported Register File Built From A Three Ported Memor 1 (40.81 KiB) Viewed 15 times

The register file shown in Figure-1 is a 16-register x 32-bit three-ported register file built from a three-ported memory. The register file has two read ports (A1/RD1 and A2/RD2) and one write port (A3/WD3). The 4-bit addresses, A1, A2, and A3, can each access all 24 = 16 registers. Two registers can be read and one register can be written simultaneously. Create a register.sv file with behavioral design and test your design with the register_testbench.sv file that you will create. CLK WE3 A1 RD1 4 32 A2 RD2 32 +4 A3 WD3 32 Register File Figure-1