Part(C):DC Analysis of PMOS circuit Using orCAD, for the above circuit: 3) Apply VS=3V, i) iii) Vto -1.6V, L-lu, W=70u M

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Part C Dc Analysis Of Pmos Circuit Using Orcad For The Above Circuit 3 Apply Vs 3v I Iii Vto 1 6v L Lu W 70u M 1 (34.29 KiB) Viewed 10 times

Part(C):DC Analysis of PMOS circuit Using orCAD, for the above circuit: 3) Apply VS=3V, i) iii) Vto -1.6V, L-lu, W=70u M1 MbreakpD VG VD ID RD Fig.2 RD=0.5K, Simulate the circuit to Find VD and ID. ii) RD=2K, Simulate the circuit to Find VD and ID. Use trial and error to find RD which make the transistor @ the edge of saturation (VSD= VSG-|Vtp|) O VS O