This exercise refers to the design of a multiplexer circuit
capable of manage 4 data streams (A, B, C, D), controlled by a
group of signals selection Si, where i=0,1, … , N-1, and N is the
number of control signals. A) Make a block diagram that identifies
with the signs of clarity control, input and output signals. In
particular, do not forget to determine the number of selection
signals N for the correct operation of this multiplexor. B) Make
the corresponding truth table that allows the design of this device
using combinational logic. C) Write the pertinent logical
expressions that define the operation of the device. Find the most
simplified expressions. If this is the case, use K-maps to achieve
this goal.
This exercise refers to the design of a multiplexer circuit capable of manage 4 data streams (A, B, C, D), controlled by
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