pls help

Post by **answerhappygod** » Fri May 20, 2022 12:22 pm

pls help

: Pls Help 1 (12.76 KiB) Viewed 39 times

void 11 initialize() { //just need to zero out the valid bit in each cach entry. //However, there's no reason not to write a 0 to the entire //v_d_tag field, since that's more efficient (no masking/shifting) // CODE HERE }

Evoid 11_cache_access (uint32_t address, uint32_t write_data, void uint8_t control, uint32_t *read_data, uint8_t *status) { //Extract from the address the index of the cache entry in the cache. //Use the L1_ADDRESS_INDEX_MASK mask to mask out the appropriate //bits of the address and L1_ADDRESS_INDEX_SHIFT //to shift the appropriate amount. //CODE HERE //Extract from the address the tag bits. //Use the L1_ADDRESS_TAG_MASK mask to mask out the appropriate //bits of the address and L1_ADDRESS_TAG_SHIFT //to shift the appropriate amount. //CODE HERE //Extract from the address the word offset within the cache line. //Use the L1_ADDRESS_WORD_OFFSET_MASK to mask out the appropriate bits of //the address and L1_ADDRESS_WORD_OFFSET_SHIFT to shift the bits the //appropriate amount. //CODE HERE //if the cache entry at the computed index has a zero valid bit or //if the entry's tag does not match the tag bits of //the address, then it is a cache miss: Set the //low bit of the status byte appropriately. There's nothing //more to do in this case, the function can return. //CODE HERE //Otherwise, it's a cache hit: //If a read operation was specified, the appropriate word (as specified by //the word offset extracted from the address) of the entry's //cache line data should be written to read_data. //If a write operation was specified, the value of write_data should be //written to the appropriate word of the entry's cache line data and //the entry's dirty bit should be set. //CODE HERE

void 11_insert_line (uint32_t address, uint32_t write_data[], uint32_t *evicted_writeback_address, uint32_t evicted_writeback_data[], uint8_t *status) //Extract from the address the index of the cache entry in the cache. // See 11_cache_access, above. //CODE HERE 1/Extract from the address the tag bits. // See 11_cache_access, above. //CODE HERE //If the cache entry at the computed index has the valid bit = 1 and //the dirty bit = 1, then that cache entry has to be written back / /before being overwritten by the new cache line. //The address to write the current entry back to is constructed from the //entry's tag and the index in the cache by: 1/ (evicted_entry_tag << L1_ADDRESS_TAG_SHIFT) I (index << L1_ADDRESS_INDEX_SHIFT) //This address should be written to the evicted_writeback_address output //parameter. //The cache line data in the current entry should be copied to the //evicted_writeback_data array. //The lowest bit of the status byte should be set to 1 to indicate that //the write-back is needed. //CODE HERE 1/Otherwise, i.e. either the current entry is not valid or hasn't been written to, //no writeback is needed. Just set the lowest bit of the status byte to 0. //CODE HERE // Now (for both cases, write-back or not), write the incoming cache line // in write_data to the selected cache entry. //CODE HERE // set the valid bit, clear the dirty bit, and write the tag //CODE HERE