In Verilog HDL, what is the output for the following logical operations: i) 1 x ii) 0 & x iii) 0 | X iv) 1 & x v) 1 &z v

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In Verilog Hdl What Is The Output For The Following Logical Operations I 1 X Ii 0 X Iii 0 X Iv 1 X V 1 Z V 1 (47.46 KiB) Viewed 30 times

In Verilog HDL, what is the output for the following logical operations: i) 1 x ii) 0 & x iii) 0 | X iv) 1 & x v) 1 &z vi) z & x vii) 0^2 viii) 2 x ix) 1^z x) z^x Assume that x and z as undefined and high impedance states respectively. Design a 8 bit ALU of a microprocessor using Verilog HDL that can calculate the following parameters: subtraction, borrow flag, sign flag, zero flag, parity flag and overflow flag. Define the following memories in Verilog HDL: i) 4Kb ii) 8KB