(10 points) The following circuit is often used as shift register in digital systems. Assume that tsu = 3ns, thold= 4ns,
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(10 points) The following circuit is often used as shift register in digital systems. Assume that tsu = 3ns, thold= 4ns,
(10 points) The following circuit is often used as shift register in digital systems. Assume that tsu = 3ns, thold= 4ns, and tc2q = 2ns. (a) What is the maximum clock frequency at which the circuit can operate correctly? (b) Does this circuit satisfy the hold time constraint? Why? D 句 Clock
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