w Question No. Choose at least one correct answer 1 Marks: 3 1. The D flip-flop shown will a. set on the next clock puls
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w Question No. Choose at least one correct answer 1 Marks: 3 1. The D flip-flop shown will a. set on the next clock puls
w Question No. Choose at least one correct answer 1 Marks: 3 1. The D flip-flop shown will a. set on the next clock pulse b. reset on the next clock pulse c. Iatch on the next clock pulse Doggle on the next clock pulse 2. For the J-K flip-flop shown, the number of inputs that are asynchronous is 21 b. 2 3 d. 4 GE 3. The time interval illustrated is called ten c. set-up time d. hold time Out 4. The output will be High if a. A <B b. A >B c. both a and bare correct @ A = B A B A 5. The circuit shown is equivalent to an AND gate b. XOR gate OR gate d. none of the above Х 6. Which data line is selected if S 8 = 112 ats a. Do OD c. D: d. D: Data dos D D Page 2 of 7
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