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1. [30 points] This problem pertains to the following sequence of MIPS instructions: ; # and yes the 2 is a number Instruction Address Ox24 Ox28 0x2C Ox30 Ox34 Ox38 Instruction add $1, $2, $1 beq $1, $3, 2 nop add $12, $2, $2 add $13, $12, $2 sw $13, 10 ($10)
Register Contents 1 0x4 2 Ox14 3 Ox18 10 0x100 12 OxF Table 1: Contents of selected registers of the register file
Figure 3: Multi-cycle computer. COMPLETED MULTICYCLE DATAPATH AND CONTROL ESTE ALL Dam பாயை Raw PRED A Iruction 31 26 Intro (25-911 Instruction 20-10 Intro anoj Intretien HEBOH Road Read Region Memes جاتا ALU ALU ALUME Inst 10-11 ter 2 Instruction 115-01 M ALU regler Shin lara mation
The University of Texas at Dallas UT DALLAS Erik Jonsson School of Engineering & Computer Science STEPS IN EXECUTING AN INSTRUCTION Step Jumps Instruction Fetch Instruction decode, Register Fetch Execution, address comp. branch/jump completion Memory access or R-type completion Memory read completion R-type Load Store Branches IR = M[PC] PC = PC + 4 A = Reg[IR[25-21]] B = Reg[IR[20-16]] ALUOut = PC + [sign-extend(IR[15-0])<<2) ALUOut = A op B ALUOut = A If A == B then + (sign-extend PC = ALUOut (IR[15-01) Figure 1: The steps in executing an instruction in the multicycle implementation. PC = PC[31-28] concatenated w/ (IR[25-0]<<2) Reg[/R[15–11]] = ALUOut MDR M[ALUOut] = = M[ALUOut] B Reg(!R[20–16]] = MDR