PLEASE POST THE FULL CODE WITH NO ERRORS USING VERILOG HDL

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PLEASE POST THE FULL CODE WITH NO ERRORS USING VERILOG
HDL

Please Post The Full Code With No Errors Using Verilog Hdl 1 (164.31 KiB) Viewed 46 times

Project Description Design a week to date convertor project using Quartus 13.1. The project should take “Week Number of the Year” and “Day of Week” as input, and then displays date with month (ddmm) on four 7 segment display outputs, as shown in figure below, When user presses Selection Bit (use push button) display format should change to (mmdd).e. month first then date. . When user presses Reset Bit (use another push button) displays on four 7 segment will be (-11-). Week Number of the Year [5..O] 7 Seg Decoder1 -88 Week to dd[4...] Date Convertor mm[4..0), Multiplexers (Maximum 2 nos) 7 Seg Decoder2 -88 Day of Week [2..0] 1 Reset Bit 1 Selection Bit Figure 1: Week to Date Convertor Schematics To enter input use binary of 1 for Sunday, 2 for Monday ...likewise till 7 for Saturday. Week number is from 1 to 53. If input is invalid, all 7 segments should reset to (8). Number of days in different months are, 1) January 31 days, 2) February 28 days, 3) March 31 days, 4) April 30 days, 5) May 31 days, 6) June 30 days, 7) July 31 days, 8) August 31 days, 9) September 30 days, 10) October 31 days, 11) November 30 days, 12) December 31 days. First day of year is "Saturday".