(PLEASE HAND WRITTEN) Question 2: Consider three processors with three cache configurations: Processor 1: Direct-mapped

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(PLEASE HAND WRITTEN)
Question 2:
Consider three processors with three cache configurations:
Processor 1: Direct-mapped i-cache and d-cache with one-word blocks
Instruction miss-rate = 4%, data miss-rate = 6% Processor 2:
Direct-mapped i-cache and d-cache with four-word blocks Instruction
miss-rate = 2%, data miss-rate = 4% Processor 3: Two-way set
associative i-cache and d-cache with four-word blocks Instruction
miss-rate = 2%, data miss-rate = 3% a) For these processors, 50% of
the instructions contain a data reference. Assume that the.cache
penalty is 6 + Block size in words. Determine which processor
spends the most cycles on cache misses.
b) The cycle time is 420 ps for Processor 1 and 2, and 310 ps
for the third processor. Determine which processor is the fastest
and which one is the slowest.