. Create a state transition diagram and an ASM for the following problem statement: Design a state machine with two inpu
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. Create a state transition diagram and an ASM for the following problem statement: Design a state machine with two inpu
. Create a state transition diagram and an ASM for the following problem statement: Design a state machine with two inputs, INIT and X, and one Moore-type output Z. As long as INIT is asserted, Z is continuously 0. Once INIT is negated, Z should remain 0 until X has been 0 for two clock ticks and 1 for two clock ticks, regardless of the order of occurrence. Then Z should go to 1 and remain 1 until INIT is asserted again. Thus the following 4 bit sequences of X should be detected: 0011 0101 0110 1001 1010 1100, but it may also take more than 4 bits to get two 1's and two 0's, so Z should be asserted at the end of the sequence X= 00000010001 as well, for example. (Hint: no more than 10 states are required.)
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